MB-OFDM communication system is being widely used as one of standards for UWB (Ultra Wide Band) systems. The MB-OFDM system has the characteristic of low power consumption and data transfer rate up to 480 Mbps. Requirements for such performances make it difficult for system developers to implement MB-OFDM systems.
Interleaver is one of the most important elements used in most communication systems as well as the MB-OFDM systems. The interleaver performs an interleaving process of rearranging input bit sequences such that they are not adjacent each other, in order to increase robustness to burst errors in a data transmission channel.
The interleaver of the MB-OFDM system performs three successive sub-processes: symbol interleaving, tone interleaving and cyclic shift.
FIG. 1 shows a block diagram for a structure of general interleaver. Referring to FIG. 1, an interleaver 100 includes a symbol interleaving part 110, a tone interleaving part 120, a cyclic shifting part 130 and two memories 140 and 150. An input signal to be transmitted is subjected to three-phase processes of symbol interleaving, tone interleaving and cyclic shift in the interleaver 100. The first and second memories 140 and 150 serve as buffers for temporarily storing data produced by the interleaving sub-processes.
The interleaving sub-processes may be expressed as the following Equations 1 to 3 representing symbol interleaving, tone interleaving and cyclic shift, respectively, as follows:
                                          a            S                    ⁡                      [            i            ]                          =                  a          ⁡                      [                                          ⌊                                  i                                      N                    CBPS                                                  ⌋                            +                                                6                                      N                    TDS                                                  ×                                  mod                  ⁡                                      (                                          i                      ,                                              N                        CBPS                                                              )                                                                        ]                                              [                  Equation          ⁢                                          ⁢          1                ]            
                                          a            T                    ⁡                      [            i            ]                          =                              a            S                    ⁡                      [                                          ⌊                                  i                                      N                    Tint                                                  ⌋                            +                              10                ×                                  mod                  ⁡                                      (                                          i                      ,                                              N                        Tint                                                              )                                                                        ]                                              [                  Equation          ⁢                                          ⁢          2                ]            b[i]=at[m(i)×NCBPS+mod(i+m(i)×Ncyc,NCBPS)]  [Equation 3]
In the above equations, a, aS, aT and b represent input bits to the interleaver 100, output bits from the symbol interleaving part 110, output bits from the tone interleaving part 120 and output bits from the cyclic shifting part 130, respectively. m(i) └i/NCBPS┘, and NCBPS, NTDS, NTint and Ncyc are constant values related to data rate in the MB-OFDM system.
TABLE 1ToneTDSCoded Bits/InterleaverCyclicData RateFactorOFDM SymbolBlock SizeShift(Mb/s)(NTDS)(NCBPS)(NTint)(Ncyc)53.3210010338021001033106.7220020661602200206620022002066320120020334001200203348012002033
In general, the three-phase processes are implemented with dedicated memories (for example, 140 and 150 in FIG. 1) such as interface buffers that temporarily store results of the sub-processes. Since the sub-processes have to be performed in series, delay and performance of the interleaver are determined by the sum of performance matrices of the sub-processes. For example, the general interleaver shown in FIG. 1 produces a total of eight-symbol delay, which consist of six-symbol delay for the symbol interleaving, one-symbol delay for the tone interleaving and one-symbol delay for the cyclic shift.
As one of measures taken to avoid such a delay, a pipeline structure may be considered to improved system performance. However, this pipeline approach requires a memory system which is even more complicated than that of a non-pipeline approach. Moreover, this pipeline approach has a demerit of high power consumption.